1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and, more particularly to a semiconductor device having on a substrate a diode formed by making use of a double diffused metal oxide silicon (DMOS) structure and a method of manufacturing the same.
2. Description of the Related Art
Diodes have been used in various circuits for the purpose of preventing a reverse flow of an electric current. As an example of usage of the diodes, in a system employing an integrated circuit including double diffused metal oxide silicon (DMOS), a diode is interposed between the DMOS and a terminal thereof.
It is also conceivable to use a stand-alone diode as the diode and connect the stand-alone diode to the terminal of the DMOS. However, in this form, the diode is provided on the outside of a chip on which the DMOS and the like are formed. Another substrate is necessary for the diode, a setting area increases, and cost also increases. Therefore, it is desirable to use a diode-on-chip obtained by forming a diode and the like on a single chip or the same substrate.
On the other hand, in the past, a device in which different types of transistors and the like are mixedly mounted on a single chip and are isolated from each other by isolation trench is known. As such a device having different types of transistors mixedly mounted, for example, there is a Bi-CDMOS. In the Bi-CDMOS, all of a bipolar transistor, a complementary metal oxide semiconductor (CMOS), and a DMOS are realized on a single integrated chip. As an example of a DMOS as a device with high withstand voltage, there is, for example, a DMOS disclosed in Japanese Patent Application Laid-Open No. 2008-140817.
Therefore, as the diode, it is conceivable to form a diode on a substrate same as the substrate on which the Bi-CMOS is formed. However, the technology in the past for forming a diode on a substrate has problems explained below.
As a first technology in the past for forming a diode on a substrate, there is a technology for forming an N-type semiconductor layer on a P-type substrate and forming a P-type region on the N-type semiconductor layer. In the first technology in the past, although a PN diode is formed by the P-type region and the N-type semiconductor layer, at the same time, a parasitic PNP structure is formed by the PN diode and the P-type substrate. Therefore, an electric current flowing through the PN diode leaks out to the P-type substrate because of the parasitic PNP structure. Therefore, for example, when a diode is connected to a DMOS, an electric current led out from the DMOS leaks out to the P-type substrate and current ability falls. When there is a negative input to an anode terminal of the diode, in the PNP structure, the potential of the P-type substrate is relatively higher than the potential of the N-type semiconductor layer. An electric current passes from the substrate to the terminal at several volts.
As a second technology in the past for forming a diode on a substrate, there is a technology for using a silicon on insulator (SOI) substrate. Specifically, an SOI substrate obtained by forming a silicon oxide film on a silicon substrate is used and an N-type semiconductor layer and a P-type region are formed on the SOI substrate to form a PN diode. In this case, because the lower silicon substrate and the upper N-type semiconductor layer are completely divided by the silicon oxide film, an electric current does not leak out to the silicon substrate. The leakage of an electric current due to the parasitic PNP structure, which is the problem in the first technology in the past, can be prevented. In particular, an electric current tends to leak out to the substrate when a diode is used under high temperature. Therefore, the use of the SOI substrate is effective when current ability is required. However, the SOI substrate is extremely expensive compared with a normal silicon substrate.
As a third technology in the past for forming a diode on a substrate, for example, there is a technology for forming a PNP-type bipolar transistor on a P-type substrate via an N-type buried layer and making use of this PNP-type bipolar transistor structure. Specifically, an N-type buried layer is formed on a P-type substrate and a PNP-type bipolar transistor is formed on the N-type buried layer to isolate the PNP-type bipolar transistor from the P-type substrate with an N-type region including the N-type buried layer. The PNP-bipolar transistor with a collector and a base thereof short-circuited is used as a diode. In this technology in the past, the P-type substrate and the diode section are isolated by the N-type region including the N-type buried layer. When high potential is applied to the N-type buried layer, the N-type region has relatively higher potential than the P-type substrate. Therefore, leak-out of an electric current from the diode to the P-type substrate can be suppressed.
However, in the third technology in the past, a plurality of layers are laminated between the diode section and the P-type substrate. In general, in a transistor of this type, withstand voltage depends on the size in the vertical direction of a diffusing layer. Therefore, to realize high withstand voltage with this technology in the past, it is necessary to increase the thickness of the diffusing layer and, therefore, increase the thickness of a device. When the thickness of the device is increased to control withstand voltage, in particular, to create deep diffusion for ensuring high withstand voltage, an apparatus that injects ions into silicon at ultrahigh acceleration voltage is necessary. However, this is technically difficult depending on the magnitude of withstand voltage.